RTL (ASIC) Design Engineer
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ACL Digital
Dehra Dun
RTL Design Engineer (SDC Constraints): +:: /We are looking for a highly skilled Senior RTL ASIC Design Engineer with strong hands-on experience in SDC Constraints. The ideal candidate will have deep expertise in RTL design, timing constraints, and close collaboration with synthesis and STA teams.➖ Design and develop RTL (Verilog/SystemVerilog) for complex ASIC blocks and subsystems➖ Create,... |
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a day ago
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