RTL Design Engineer (ASIC RTL)
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Proxelera
Kochi
Experience: 5–10 years only Client: Proxelera ODC – Edge AI Video Processing Chip This role is for engineers who live inside RTL, not around it.You will design real ASIC blocks that ship, not glue logic that gets forgotten. If micro-architecture to clean, timing-aware RTL is your comfort zone, this is your lane. Work • Own block-level RTL development in Verilog/SystemVerilog for ASIC... |
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13 hours ago
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